1. Field of the Invention
The present invention related to a field effect transistor (FET) gate bias voltage application circuit and a semiconductor apparatus in which this FET gate bias voltage application circuit is installed.
2. Description of Related Art
An example of a conventional FET gate bias voltage application circuit will be explained with reference to FIG. 1.
Q.sub.1 is a FET to be controlled. In this example, it is assumed that this is an n-channel depression type FET whose threshold voltage V.sub.th is -1.5V. G, D, and S refer to a gate, a drain, and a source, respectively. A voltage V.sub.dd (+3V) is applied to the drain D. The source S is grounded. A voltage applied to a serial circuit made of resistors R.sub.1 (1333.OMEGA.) and R.sub.2 (667.OMEGA.) is divided at the connection node of these resistors. The voltage at this connection node is used as a gate bias voltage. To be more precise, +3V is applied to one end V.sub.g1 of this serial circuit and -3V is applied to the other end V.sub.g2 of this serial circuit. The voltage (-1V) at the connection point of the two resistors is applied as a ate bias voltage V.sub.g to the gate G of the controlled FET Q.sub.1. he threshold voltage of this controlled FET Q.sub.1 is set to -1.5V. When the gate bias voltage V.sub.g is applied to this controlled FET Q.sub.1 this controlled FET Q.sub.1 becomes conductive. The reference electric potential of a high frequency input signal superposed on this gate bias voltage V.sub.g and input to this controlled FET Q.sub.1 is determined by this gate bias voltage V.sub.9.
The drain-source current of a FET is expressed by the following equation EQU I.sub.ds .apprxeq.K(V.sub.gs -V.sub.th).sup.2,
where
I.sub.ds represent the drain-source current of the FET, PA0 K represents the K-value of the FET, PA0 V.sub.gs represents the gate-source voltage of the FET, and PA0 V.sub.th represents the threshold voltage of the FET.
Since both the K-value and the threshold voltage have negative temperature coefficients, the K-value and the threshold voltage are canceled when the surrounding temperature changes. Therefore, the source-drain current is not affected significantly by the change in the surrounding temperature.
However, it is known that the gate-drain current I.sub.gd of a Schottky FET (all the FETs to be described in what follows are Schottky FETs) is expressed by EQU I.sub.gd =I.sub.gd.DELTA. (exp(qV/kT)-1),
where
I.sub.gd.DELTA. SA*T.sup.2 exp (-q.PHI..sub.S /kT), PA1 S is the area of the gate, PA1 A* is the effective Richardson constant, PA1 q is the unit electric charge, PA1 .PHI..sub.S is the height of the Schottky barrier, PA1 k is the Boltzmann constant, and PA1 T is the absolute temperature.
When the FET is used at a high temperature, for example, above 50.degree. C., the gate-drain current I.sub.gd, which should remain zero, increases to a level that cannot be ignored. As a result, the gate-bias voltage of the FET changes. In the example shown in FIG. 1, the amount of voltage drop within the resistor R.sub.2 increases when the gate-drain current I.sub.gd increases. This causes the voltage V.sub.g at the potential dividing node to be shifted in the positive direction.
FIG. 2 shows the manner in which the gate voltage V.sub.g of the FET gate voltage application circuit shown in FIG. 1 is shifted in the positive direction when the surrounding temperature rises above 50.degree. C.
This positive shift of the gate voltage V.sub.g increases the drain-source current I.sub.ds of the controlled n-channel depression type FET, which is a problematic characteristic.
This characteristic causes a serious problem when the FET is used for apparatuses exposed to a wide range of surrounding temperature fluctuation such as a cellular phone.
In addition, since the carrier mobility of GaAs is large, it operates fast, which is an advantage. In particular, it is known that GaAs is useful as a semiconductor material for a high frequency wave (microwave) circuit amplifier. The above-described characteristic also poses a significant problem when a GaAs FET is installed in a high frequency wave (microwave) circuit amplifier.
Given this problem, it is an object of the present invention to provide a FET gate bias voltage application circuit, to which a voltage obtained by dividing a direct current resistance is applied as a gate bias voltage to the gate of a controlled FET, capable of compensating for changes in the gate bias voltage caused by temperature changes to suppress the change in the drain-source current of the controlled FET and a semiconductor apparatus in which this FET gate bias voltage application circuit is installed.